PA-RISC
Precision Architecture RISC (PA-RISC) or Hewlett Packard Precision Architecture (HP/PA or simply HPPA), is a general purpose computer instruction set architecture (ISA) developed by Hewlett-Packard from the 1980s until the 2000s.
| Designer | Hewlett-Packard |
|---|---|
| Bits | 64-bit (32→64) |
| Introduced | 1986 (1996 PA-RISC 2.0) |
| Version | 2.0 (1996) |
| Design | RISC |
| Encoding | Fixed |
| Branching | Compare and branch |
| Endianness | Big |
| Extensions | Multimedia Acceleration eXtensions (MAX), MAX-2 |
| Open | No |
| Registers | |
| General-purpose | 32 |
| Floating point | 32 64-bit (16 64-bit in PA-RISC 1.0) |
The architecture was introduced on 26 February 1986, when the HP 3000 Series 930 and HP 9000 Model 840 computers were launched featuring the first implementation, the TS1. HP stopped selling PA-RISC-based HP 9000 systems at the end of 2008 but supported servers running PA-RISC chips until 2013. PA-RISC was succeeded by the Itanium (originally IA-64) ISA, jointly developed by HP and Intel.
This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.