Questions tagged [thumb]

A reduced instruction set for ARM processors (based on a 16-bit encoding, instead of 32 bits in standard ARM mode), originally intended for embedded systems with a small amount of RAM. Also for question with the later Thumb2 mixed 16 and 32 bit instruction modes. Consider the tags 'slider' and 'thumbnails' for other meanings of 'thumb'.

This tag is for questions concerning the ARM CPU's operating mode called thumb. Questions about thumb assembly language, interworking between thumb and ARM mode as well as operating system issue in dealing with thumb mode are on topic.

The Thumb instruction set (16 bit only) with restricted use of r8-r15 was later extended to include a mix of 16 and 32 bit instructions. This was called Thumb-2. Thumb-2 is a marketing term. Different CPU families and even specific devices have different instructions. Thumb-2 is fairly meaningless in a technical sense (except it means variable length instructions (always two halfwords) are available along with 16 bit thumb instructions). Thumb-2 at wikipedia

On modern ARM CPUs, Thumb-2 is as rich as the traditional 32-bit mode and much more memory efficient.

For questions related to the scrollbar thumbs consider one of,

For questions about thumbnails, use the tag .

See also:

The paper Profile guided selection of ARM and thumb instructions gives some benchmarking of legacy thumb versus 32 bit modes. Different algorithms are faster in one mode versus the other. The paper is somewhat obsolete as Thumb-2 will be more efficient in modern (2014+) CPUs. Although some deeply embedded devices may only support Thumb.

252 questions
0
votes
2 answers

Useful methods to reduce iphone app binary size

How to reduce app binary size to fit the requirement of apple app store? Any useful method available? We have tried the following methods. Produce 16 bytes thumb instruction instead of original 32 bytes. Using LLVM + XCode 4.2 to build the…
jianhua
  • 1,011
  • 1
  • 12
  • 28
0
votes
2 answers

How does the arm-none-eabi-as choose section alignment?

I am playing with arm-none-eabi-as trying to understand how it aligns sections. I have the following source: ; source.s .text .byte 0xff .byte 0xff .byte 0xff I am inspecting the resulting object file: $ arm-none-eabi-as -mthumb -o source.o…
Alexandru N. Onea
  • 423
  • 2
  • 6
  • 18
0
votes
1 answer

Compare signed integers and return either 0 or -1 in Thumb2 assembly

In thumb2 assembly, when r0 and r1 have signed integers, I like to have r1=-1 (i.e. 0xffffffff) if r0 < r1, otherwise r1=0. I can simply code: 4288 cmp r0, r1 bfb4 ite lt f04f 31ff movlt.w r1, #-1 2100 …
0
votes
2 answers

Assembler Thumb Mode

im new in coding with Assembler and I have a question concerning the .thumb and .Syntax unified directive. I know there is a instruction set "Thumb", which contains 16-Bit commands, the Thumb2 set contains 16 and 32 Bit commands and so does the ARM…
0
votes
2 answers

STM32 sometimes hardfault on reboot (thumb instruction issue?)

STM32L496 micro is hard faulting when power is cycled, but only on some builds of firmware, others are ok. I've been able to track it down to a specific path in the assembly, what looks like is happening is a vector table address is loaded into R3…
Nick Fritz
  • 21
  • 3
0
votes
0 answers

Need an automatic ARM to Thumb code translator

I need to build an application for CPU cortex-m0plus, which (if I understand right) doesn't support ARM instruction set. According to docs, it supports ARMv6-M Thumb instruction set. I'm using a 3rd-party library, which has some code written in ARM…
valdo
  • 12,632
  • 2
  • 37
  • 67
0
votes
0 answers

RASM2 can't re-assemble its own disassembly output for ARM?

In case I run the code below on Linux: rasm2 -a arm -b 16 -d "28 46 0d f2 74 4d f0 bd" Result is: mov r0, r5 addw sp, sp, 0x474 pop {r4, r5, r6, r7, pc} But now the question is, if I try to re-assemble the disassembly back into hexadecimal…
rabbit
  • 43
  • 1
  • 4
0
votes
0 answers

Assembling the BL instruction in thumb mode

I want to hand-assemble a BL instruction for the ARM family of processors. I am experimenting with a Raspberry OS Pi 3+, but would eventually use it on a Cortex M0+ (Pico). I have tried understanding it from the ARM manuals, but only get…
Shripathi Kamath
  • 310
  • 3
  • 10
0
votes
1 answer

ARM Cortex-M3: Store digits/string in memory

I'm studying ARM Cortex-M3 with Thumb-2 instruction. I found some code that declares some data areas. AREA RESET, DATA, READONLY DULIEU DCB &0F,&0D,&7,&0A The first code is for declaring hexa number: FD7A. What does the'&' mean before each…
Haru
  • 71
  • 5
0
votes
2 answers

ARM Thumb GCC Disassembled C. Caller-saved registers not saved and loading and storing same register immediately

Context: STM32F469 Cortex-M4 (ARMv7-M Thumb-2), Win 10, GCC, STM32CubeIDE; Learning/Trying out inline assembly & reading disassembly, stack managements etc., writing to core registers, observing contents of registers, examining RAM around stack…
Ilya
  • 992
  • 7
  • 14
0
votes
1 answer

Troubling displaying bitmap background using libnds

I'm having some issues getting a 16-bit (ARGB, 1-bit alpha, 5-bit colour channel) bitmap image which I converted using GRIT to display. I have the following image, smpte_colour_bars.png. I converted it with GRIT using the following command line:…
0
votes
2 answers

How does subtracting 0x1 - 0x80000000 cause an overflow?

MOV R0, #0x80000000 MOV R1, #0x1 SUBS R2, R1, R0 Upon Running this code, Flag N and Z are set. Now, I know N flag is set if the operation results in a negative result and Z flag is set when there is an overflow. The thing I don't…
Andrew Tye
  • 25
  • 4
0
votes
1 answer

How to set the instruction size (16 bit or 32 bit) for a function on ARM thumb?

ARM has multiple instruction sets: A32 (32 bit long instructions) and mixed-length T32 (either 32 bit or 16 bit long instructions). T32 was called Thumb before ArmV8. While 16 bit instructions reduce code size, 32 bit instructions can have higher…
Mika Vatanen
  • 3,782
  • 1
  • 28
  • 33
0
votes
1 answer

ARMv7 T3 encoding for adds

I can't tell how to determine the following: i, 10th bit on the left. imm3, what's the difference for this one with imm8?
Mzq
  • 1,796
  • 4
  • 30
  • 65
0
votes
0 answers

ldr.w instruction causing unaligned access hardfault on ARM Cortex-M7 with Thumb2

I am getting a unaligned access hardfault on the ldr.w instruction with Thumb2 on ARM Cortex-M7. The microcontroller is an STM32H745xx and I am using STM32CubeIDE. I am using the STM32 arm-eabi-none-gcc toolchain to compile the project, with the…
ethorn
  • 1