SPARC(Scalable Processor Architecture) Sun Microsystems's specific CPU.
SPARC is a RISC instruction set architecture (ISA) developed by Sun Microsystems (now merged into Oracle), introduced in mid-1987.
SPARC hardware often runs Solaris, the Unix operating system, but other OSes run on SPARC hardware, and solaris runs on more than just SPARC hardware.
SPARC doesn't allow unaligned loads, so SIGBUS (bus error) faults are a common problem when porting C or C++ to SPARC from x86 (for example).
In assembly, SPARC's 32 architectural registers are a sliding window onto a virtual register file. The save instruction that slides the window might or might not spill to memory, depending on whether the CPU microarchitecture is out of registers when it runs.
- https://en.wikipedia.org/wiki/SPARC lots of details (clock speeds, cache sizes, number of cores) about specific implementations, e.g. UltraSPARC T2.
- Understanding stacks and registers in the Sparc architecture(s)
- https://en.wikibooks.org/wiki/SPARC_Assembly (not very complete)
