Questions tagged [sign-extension]
72 questions
2
votes
1 answer
Ollydbg : sign extending with Movsx
Movsx sign-extends a register with 1 right?
So why in Ollydbg i got this :
Before:
After:
I should have FFFFFF65 instead of 00000065 in ECX no?
Thank you !
Duke Nukem
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2
votes
2 answers
Shifting, types and sign extensions in C
I have the following code:
unsigned char chr = 234; // 1110 1010
unsigned long result = 0;
result = chr << 24;
And now result will equal 18446744073340452864, which is 1111 1111 1111 1111 1111 1111 1111 1111 1110 1010 0000 0000 0000 0000 0000 0000…
Jonathan.
- 53,997
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2
votes
1 answer
About addi instruction in MIPS
I learned that sign extension occurs in immediate value of MIPS addi instruction.
(http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Mips/addi.html)
However, I'm not sure when will it sign extend to a minus value.
I tried
main:
addi $t0, $0,…
user3415167
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2
votes
1 answer
Wrong sign extension c++/qt
I am running the following code on an Desktop x64 Intel architecture (gcc compiler, linux) and on an RaspberryPi Arm (gcc cross compiler).
quint32…
Dati
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- 6
2
votes
1 answer
Portable way of printing hexa values with sprintf
I've had some trouble with binary-to-(printable)hexa conversions. I've reached a functional (for my system) way of writing the code, but I need to know if it is portable on all systems (OS & hardware).
So this is my function (trying to construct a…
simm
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- 4
2
votes
4 answers
What is necessity of sign-extension?
Consider following piece of C code -
char sum_char(char a,char b)
{
char c = a+b;
return c;
}
It involves -
Convert second parameter to sign extension.
Push signed extension parameter on stack as b.
Convert first parameter to sign…
Vikram
- 1,999
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1
vote
0 answers
MOVSXD operation when operand sizes are equal
Given the movsxd instruction on the x86-64 architecture (see: movsxd)
The instructions:
MOVSXD r16, r/m16
and
MOVSXD r32, r/m32
receive source & destination operands of the same sizes. As far as I understand, there's no point for sign extension…
Rouki
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1
vote
1 answer
Arm64- why all filled with 1 the lower 32bit? Isn't it should be only 1 value?
mov x0, #1000
mov w6, #-1
add x7,x0,x6, sxtw
what will be the value of x6 and x7? [In hex]
Here ans x6=0xffffffff //why all value of lower half filled with 1?
and how sxtw work when the ans will be 999 in decimal. I want to know details how this…
Parvez Hossain
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- 5
1
vote
1 answer
where does the sign extention happen in lh/lb ( Load Half / Load Byte )?
I studied mips for while now, and about the ( R-I-J ) formats and when does the sign extention becomes necessary when dealing with I format.
but in case of lh( Load Half ), or lb( Load Byte ), once they've been reed from the memory, they get sign…
gost1212
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1
vote
1 answer
Sign extension in assembly IA32
I'm new to assembly and I'm using IA32 architecture.
I'm trying code a .s function that produces the following operation: C + A - D + B
A is an 8-bit variable
B is a 16-bit variable
C and D are both 32-bit variables
The function should return a…
José Soares
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1
vote
1 answer
needs to understand the meaning behind 0x7fffffff and 0xffffffff80000000 in terms of memory address space layout
# 0x00007f33caf5a85f: cmp rax, 0xffffffff80000000
# 0x00007f33caf5a865: jnl 0x7f33caf5a898
...
target_of_jnl:
# 0x00007f33caf5a898: cmp rax, 0x7fffffff
# 0x00007f33caf5a89e: jle 0x7f33caf5a8c8
The above code snip is part of an execution flow of…
syacer
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1
vote
1 answer
RISC-V: Do 12-bit immediate logical operations operate on the whole register?
I am trying to write a simulator for a RISC-V CPU and can not find a definitve answer to my question.
Let's say I want to use
ANDI rs1, rd, 0xFFF
with rs1 containing 0xFFFFFFFF and the immediate value being 0xFFF.
Does the ANDI operate on the…
Klickmann
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1
vote
2 answers
What is the most efficient way in Java to sign extend an arbitrary length pattern of bits?
Let's say, for example, I have packed three 10 bit signed integers into a Java integer.
I can extract the 10 bits easily:
int unpacked = packed & 0x3FF;
packed >>= 10;
etc ...
But now I need to sign-extend the top bit (bit 9 from the right). Is…
rghome
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1
vote
1 answer
Does movsx imply anything about the signed-ness of the destination?
From this question:
movzx ecx, al ; move byte to doubleword, zero-extension
There's also MOVSX if you want the value in al to be treated as signed.
Above, it is mentioned that 'movsx' would imply that al is signed.
Does movzx imply that al is…
ineedahero
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vote
1 answer
How to sign extend a varying sized number to 16 bits in C?
The varying sized number could either be 10-bits or 12-bits or 15-bits. I want to sign extend the immediate bits so that the 16-bit integer has the same value as the 10, 12, or 15-bit value.
EDIT
I'm sorry I didn't post the code I wrote, that isn't…
Vineeth Sai
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