Questions tagged [promela]

Process/Protocol Meta Language is a verification modelling language used to verify the logic of parallel systems.

PROMELA is a process modeling language whose intended use is to verify the logic of parallel systems. Given a program in PROMELA, Spin can verify the model for correctness by performing random or iterative simulations of the modeled system's execution, or it can generate a C program that performs a fast exhaustive verification of the system state space. During simulations and verifications SPIN checks for the absence of deadlocks, unspecified receptions, and unexecutable code. The verifier can also be used to prove the correctness of system invariants and it can find non-progress execution cycles. Finally, it supports the verification of linear time temporal constraints; either with Promela never-claims or by directly formulating the constraints in temporal logic. Each model can be verified with Spin under different types of assumptions about the environment. Once the correctness of a model has been established with Spin, that fact can be used in the construction and verification of all subsequent models.

PROMELA programs consist of processes, message channels, and variables. Processes are global objects that represent the concurrent entities of the distributed system. Message channels and variables can be declared either globally or locally within a process. Processes specify behavior, channels and global variables define the environment in which the processes run.

via: Wikipedia

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How to draw a transition system in promela?

I am new to promela. I have a programming which is written in promela: bit signal [2]; active [2] proctype proc() { l1: signal[_pid]=1; l2: !signal[1-_pid] -> l3: signal[_pid]=0; } #define sig0 (signal[0]==0) #define sig1 (signal[0]==1) Does…
Talha
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what does the never claim verify in this promela model

bool p = true; active proctype q() { do :: p=false; p=true; p=false od } never { do :: !p -> goto acceptRun :: else -> skip; skip od; acceptRun : skip } In this promela model, the never claim verifies that initially and then at every…
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How to specify path to C libraries in jspin?

I am using jspin and trying to include stdio.h library within c_code expression: c_code { #include } However, I get the following error: spin: error: No file 'stdio.h' I have checked directory where mingw is installed and it has…
Dmitry Korolev
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Time out when using Spin/Promela

If someone could explain to me why I am getting a timeout with the following code that would be great. I understand, or at least I think I do, the idea of a timeout, but with the do loops I thought this would stop this. Any advice is appreciated.…
mcdowesj
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Promela: how to use a for loop for an array of type typedef

I would like to be able use a for loop to loop through an array of typedef values as demonstrated below: typedef chanArray { chan ch[5] = [1] of {bit}; } chanArray comms[5]; active proctype Reliable() { chanArray channel; for ( channel…
Crux
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Promela, Ispin: Model checker promela modeling with spin

I'm working on model checking verification using spin model checker each time I try to run code I get error: spin: traffic_controller:12, Error: undeclared variable: to_green saw '')' = 41' child process exited abnormally also i have declared…
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Error: indexing array 'channels'

I get this error with Spin 6.4.8: spin: indexing channels[-1] - size is 3 spin: 2.pml:13, Error: indexing array 'channels' when running a simulation of the following Promela Model: chan channels[3] = [1] of { pid }; active [3] proctype node () { …
Patrick Trentin
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How to use Spin to check Promela code from the command line

I'm looking how to analyse the output of train.pml using Spin on the Windows 10 command line. Any help to make the file give the correct output would be greatly appreciated.
Andre
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Working on spin and promela

Firstly, I always get this problem of depth reached:0. I tried every possibility. Secondly, i want to reach those states mentioned in ltl formula. So is this syntax correct or not?
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