Questions tagged [pci]

Questions in this tag are only for questions related to the PCI Local Bus standard which is a computer bus for attaching hardware devices in a computer.

Questions in this tag are only for questions related to the PCI Local Bus standard which is a computer bus for attaching hardware devices in a computer.

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In order to write PCI ethernet driver. How to implement MMAP in the PCI Ethernet driver

In Ethernet PCI device driver if the driver allows applications to map user-space buffer to Driver virtual memory and allow the user to call MMAP on device driver file after opening it. Then how do implement MMAP in the PCI ETHERNET Network device…
user786
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qemu - pci_dma_read and pci_dma_write does not work

So I'm trying to learn how pci devices and drivers work using the edu device and an educational driver, and It seems like the pci_dma_write function fails to actually write the information from the the dma buffer into the allocated address in the…
Shakedess
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PCI Express driver for embedded system

We are developing an embedded system which will use a PC motherboard running Linux or Windows Embedded (have not decided which one). The board will read data from FPGA via PCI Express. Novice question: do we have to develop our own PCIe driver or we…
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Implementing PCIe Linux device driver (want to access my card registers from kernel driver)

I'm writing a device driver to access the memory in a FPGA on a PCIe card. The card boots and is probed/found :- /proc/iomem 80000000-840fffff : PCI Bus #03 80000000-83ffffff : 0000:03:00.0 84000000-840fffff : 0000:03:00.0 So reading ldd/etc I…
Ian Vaughan
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smbus access in pcie under windows

I'm looking for a way to control smbus line in PCIe slot of my PC. There's some device connected via PCIe in that slot. And I wanna access it via the SMBus line under Windows. But cannot find any API to use for that. Can you suggest me how to do…
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Difference Between PCI and PCIe

I have started reading about PCI and PCIe. I came across a point "From a software standpoint, PCI and PCI Express devices are essentially the same. PCIe devices had the same configuration space, BARs, and (usually) support the same PCI INTx…
Ajeesh
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How to turn off "REAL" PCIe power for a GPU device on Linux

I want to turn off "REAL" PCIe power for a GPU device on Linux. I found some home pages, but they could not cut the "REAL" power. I monitored the AC power usage, but all of them could not cut the real power usage. Could you tell me how to turn off…
Kuniyasu Suzaki
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How do you find the PCI memory hole on x86?

I ask as it's really hard to find solid/official documentation on a lot of things to do with x86 programming beyond the basic bootloader/real mode interrupts/protected mode/write to VGA memory tasks one would do when learning about basic OS…
user7348172
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How is PCI ROM shadowed?

in several resources I found that: ROM image must be copied to RAM to 000C0000h through 000DFFFFh. If the Class Code indicates that this is the VGA device ROM, its code must be copied into memory starting at location 000C0000h. 1: What if I have PCI…
Pyjong
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QEMU msi emulation

I am working on an emulated QEMU device to simulate an FPGA PCIe interface. I am using the lev-pci device as a base template: https://github.com/levex/kernel-qemu-pci/blob/master/qemu/hw/char/lev-pci.c My device uses MSI interrupts to communicate. …
John
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DMA/Microblaze Reads Incorrect Data after Direct Access to Physical Addresses of Userspace Pages (Kernel Scatter/Gather)

What I am trying to accomplish is make a block of memory in userspace directly accessible by a DMA core in a FPGA board over PCIe (without any interference by the kernel). In order to do so, I use posix_memalign() in userspace to allocate a block of…
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How do I discover the PCIe bus topology and slot numbers on the board?

For example, when I use multi-GPU system with CUDA C/C++ and GPUDirect 2.0 P2P, and I use nested PCI-Express Switches, as shown on picture, then I must know how many switches between any two GPUs by their PCI Bus ID, to optimize data transfer and…
Alex
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Can two Identical devices be present on the same bus in any PCI Topology

As per the PCI standard, devices are identified on the basis of Vendor Id, Device Id and the bus no. All devices of same type have identical vendor id and device id. If I put two such devices on the same bus say bus 0. How will the PCI Software…
vaibhav3002
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How should I read Intel PCI uncore performance counters on Linux as non-root?

I'd like to have a library that allows 'self profiling' of critical sections of Linux executables. In the same way that one can time a section using gettimeofday() or RDTSC I'd like to be able to count events such as branch misses and cache hits. …
Nathan Kurz
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DMA from Linux kernel-space to PCIe card

I am trying to write a linux driver for a PCIe device - the Adlink PCIe 7300A High-Speed digital-IO card. The driver works fine for normal memory transfer, but attempting to use the card's bus-mastering capabilities to initiate DMA transfer of a…
s.brookes
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