Questions tagged [iommu]

IOMMU is a memory management unit that connects a direct memory access-capable I/O bus to the main memory.

Description

In computing, an input/output memory management unit (IOMMU) is a memory management unit (MMU) that connects a direct memory access-capable (DMA-capable) I/O bus to the main memory. Like a traditional MMU, which translates CPU-visible virtual addresses to physical addresses, the IOMMU maps device-visible virtual addresses (also called device addresses or I/O addresses in this context) to physical addresses. Some units also provide memory protection from faulty devices.

An example IOMMU is the graphics address remapping table (GART) used by AGP and PCI Express graphics cards.

I/O virtualization is not performed by the CPU, but instead by the chipset.

Link

IOMMU Wiki

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How to enable IOMMU on Guest

I am planning to perform nested virtualization with GPU device. I have guest Ubuntu OS running and I have mapped GPU to it by enabling intel_iommu on the host, and configuring NVIDIA PCI as vfio-pci device. I am also able to install NVIDIA driver on…
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How to attach my device with IOMMU framework?

I'm adding IOMMU support in my linux driver and notice the IOMMU groups are assigned to the device during boot: [ 0.942274] iommu: Adding device 0000:03:00.0 to group 28 Although, when I try to iommu_attach_device() inside the driver, it fails.…
JustCoding
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INTEL VT-D Root table and context table relationship

I am trying to learn about INTEL VT-D, I've read that root table has 256 entries, with each root table points to furhter context table with 256 entries each, where each context table contains second level translation. Unfortunately I am unable to…
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Check if VT-D / IOMMU is supported by the motherboard / BIOS/UEFI and CPU

I found I can determine if VT-D / IOMMU is enabled using this code: if compgen -G "/sys/kernel/iommu_groups/*/devices/*" > /dev/null; then echo "AMD's IOMMU / Intel's VT-D is enabled in the BIOS/UEFI." else echo "AMD's IOMMU / Intel's VT-D…
Forivin
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AMD-V interrupt virtualiztion (AVIC): hw support and IOMMU interaction

I've came across Advanced Virtual Interrupt Controller (AVIC) in the AMD64 Architecture Programming Manual (APM), Volume 2. Some bits were unclear to me, so I've quickly skimmed through the popular open-source hypervisors (Qemu/KVM and Xen, to name…
vsinitsyn
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How does memory mapped I/O (MMIO) work on ARM architectures?

I would like to understand how the MMIO works on ARM architecture. I realized that ARM provides 1:1 mapping from physical address to specific peripheral. For example, to manage the GPIOX on arm, for example in Raspberry Pi, the processor accesses…
ruach
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Create an IOMMU entry in Linux

I've been browsing through the Linux IOMMU code for quite a while now and couldn't find an easy approach to directly create an IOMMU entry. I want to specify the physical address (maybe also the virtual but it is not necessary) and the device. The…
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What is the difference in physical behavior of hardware on bare metal vs VM with IOMMU passthrough?

I have some dated equipment used to run an experimental apparatus. Unfortunately, that equipment will only run on WinXP using FireWire/IEEE1394, which is becoming more and more of a pain for us to maintain hardware-wise. Unfortunately we also don't…
fergu
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Address Translation in a Bus hierarchy

Consider a bus hierarchy which comprises of a bus A which connects with another bus B. The bus B connects other two buses C and D. ab, bc and bd are corresponding bridges. Further each of these buses have their devices…
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No Host Display After GPU Passthrough

I am attempting to set up a GPU passthrough to use in a VM on my system. I am using Ubuntu 17.04 and have followed the instructions in the following link successfully after manually blacklisting the nouveau…
NJC
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Can one domain have multiple iommu page tables in the Xen environment with VT-d

As we know, IOMMU does the remapping from GPA to HPA. When I look into the codes in xen passthrough driver, It seems that all the devices belonging to dom0 (domu is the same) share one IOMMU page table. My current project uses Intel VT-d, and needs…
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I would like to learn more about VT-d (IOMMU) technology, where should I start?

I'm a low-level enthuatist, I love Intel VT-x and recently had some spare time to read and enjoy. I recently got into the term VT-d which allows to create "device realms" per device, and I would like to learn more about it, however when searching in…
Shift
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How to ensure continuous physical memory address with IOMMU?

In Linux kernel driver, can I initiate DMA with continuous physical memory region when IOMMU is in the middle? Here's my understanding of IOMMU features: Memory protection for security reasons Provides IOVA for peripherals for DMA to relax…
lymose
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DPDK EAL error when using IOVA-VA memory mode

I am running a VM inside a VMWARE server (vSphere). My goal it to set up DPDK with two HW ports, and set up a virtio_user to interact with the kernel stack. In another app I have it working but instead of virtio_user I am running KNI, it works in…
Igor_dp
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VFIO PCIe BAR write won't work. Register value falls back when program execution finished

I am using the following code to test a PCIe BAR register write through VFIO_PCI APIs. ` struct vfio_group_status group_status = { .argsz = sizeof(group_status) }; struct vfio_device_info device_info = { .argsz = sizeof(device_info) }; …
Clark
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