Questions tagged [interrupt-handling]

The concept of handling system interrupts in an application or embedded system.

The concept of handling system interrupts in an application.

This tag may also refer to an operating-system-specific way of handling interrupts, or interrupt handling in a specific type of microcontroller or processor.

Use this tag only if you have reason to believe that your issue is directly related to interrupt handling. Do not use this tag if your application is using interrupt handling, but interrupt handling does not cause the issue your are asking about.

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Crashed: AVAudioSession Notify Thread in iOS

I am getting EXC_BAD_ACCESS crash that occurs in the AudioToolBox. How to handle interrupts properly? Please have a look at crashlytics screenshot for more info.
Vinu David Jose
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Keyboard interrupt handler not working in system iso

I'm trying to write an operating system using OSDev and others. Now, I'm stuck making a keyboard interrupt handler. When I compile my OS and run the kernel using qemu-system-i386 -kernel kernel/myos.kernel everything works perfectly. When I put…
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Difference between an IRQ and interrupt vector in linux kernel

I am a little confused over IRQ and vector when it comes to working at the kernel API's. I want to use vector 0xfa for some interrupt handling which will be generated by a programmable lapic. I looked at API's such as request_irq and set_intr_gate…
zombie
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Top halves and bottom halves concept clarification

As per the guide lines of Top halves and Bottom halves, When any interrupt comes it is handled by two halves. The so-called top half is the routine that actually responds to the interrupt—the one you register with request_irq. The bottom half is a…
sagar
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Multiple interrupts on the same EXTI Line STM32

Is it possible to get multiple interrupts from te same EXTI line for par example for PA1 and PC1 they are both on EXTI1. So that by clicking on a button on PA1 a LED go on at PB6, And by clicking on PC1 that a LED toggle on PC0. Microcontroller ==>…
Sandeerius
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Why are there 2 registers in ARM for enabling/disabling interrupts instead of 1?

I was recently posed with this question. I am studying the ARM architecture, and I have tried researching it, but I feel like I do not got the right answer. My idea is that the key reason is that to avoid messing with the ongoing interrupts, we use…
fgblomqvist
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How to interact with app under Wine using winedbg?

I've run my app under Wine (wine my_app.exe) and I'd like to interact with it programatically or from the script. So I'm running winedbg and attaching to the process: $ winedbg Wine-dbg>info process 00000008 3 'terminal.exe' Wine-dbg>attach…
kenorb
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"Trapping" a processes' own sysenter calls in userspace on Windows

I'm working on a runtime non-native binary translator in Windows, and so far I've been able to "trap" interrupts (i.e. INT 0x99) for the OS binaries I'm trying to emulate by using an ugly hack that uses Windows SEH to handle invalid interrupts; but…
joshumax
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poll() returns both, POLLPRI & POLLERR

I started to get in C programming with Linux and embedded systems (router hardware and openwrt). I have got interupts on GPIOs enabled, using poll works ... nearly. I can use poll() and if i press the button to trigger the interrupt, poll() returns…
Flitzpiepe
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Interrupt handling in Device Driver

I have written a simple character driver and requested IRQ on a gpio pin and wrtten a handler for it. err = request_irq( irq, irq_handler,IRQF_SHARED | IRQF_TRIGGER_RISING, INTERRUPT_DEVICE_NAME, raspi_gpio_devp); static irqreturn_t…
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local_bh_disable, preempt_disable, local_irq_disable

local_bh_disable disables the processing of bottom halves (softirqs). Softirqs are processed on either, interrupt return path, or by the ksoftirqd-(per cpu)-thread that will be woken up if the system suffers of heavy softirq-load. preempt_disable…
user2950911
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When bottom half is called with respect to interrupt handlers

When referring to Linux Kernel Interrupt handlers as I know there are two stages of interrupt executions first is Top Half and second Bottom Half. I know Top Half will be executed immediately on occurrence of interrupt from HW but my doubt is when…
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Inter processor Interrrupts in ARM cortex A9 ( How To write an handler for Software generated Interrupt ( ARM) in Linux? )

I read that the Software generated interrupts in ARM are used as Inter-processor interrupts. I can also see that 5 of those interrupts are already in use. I also know that ARM provides 16 Software generated interrupts. In my application i am running…
Nuetrino
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How to give highest priority to ethernet interrupt in linux

I listed all interrupts with this: cat /proc/interruts it gives this: CPU0 CPU1 CPU2 CPU3 0: 126 0 0 0 IO-APIC-edge timer 1: 941 0 0 …
Taha Altuntaş
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Interrupt vector and irq mapping in do_IRQ

I'm working on a x86 system with Linux 3.6.0. For some experiments, I need to know how the IRQ is mapped to the vector. I learn from many book saying that for vector 0x0 to 0x20 is for traps and exceptions, and from vector 0x20 afterward is for the…
William Tu
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