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Questions tagged [immediate-operand]

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How many memory references are required by the CPU to execute immediate address instruction and why?

In immediate addressing mode I know that instead of operand's address we have the value of operand in the instruction itself. So, does CPU requires any memory reference as the effective address of the operand is the instruction's address itself. Any…
Yukti Kumari
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ARM Processor: Checking validity of immediate value (Bit rotation)

In an ARM Processor with 32-bit instruction size, I understand that ARM can use 8-bit to store the value and 4-bits for bit rotation instructions (bit-shift the 8-bit value by multiples of 2) in order to gain a much better range than just simple…
Ymi
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Why NASM warns when I store qword directly onto stack?

In NASM, when using dwords, I can write mov dword [rbp-16], 2147483647 instead of mov eax, 2147483647 followed by mov dword [rbp-16], eax. But with qwords, this is not the case. If I wrote mov qword [rbp-16], 2147483648 instead of mov rax,…
Sourav Kannantha B
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Instruction format in direct addressing mode

Assume a computer with a 16-bit memory and 16-bit data and address bus. So if an Instruction is of 16-bit let's say the opcode occupies 6 bits and the operand occupies the remaining 10 bits. In the direct addressing mode, the memory address of the…
Mr Bobcat
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Definition question in Assembly (RiscV), help me understand

Learning RiscV my lecturer defined a new command called Load Upper Immediate (lui) like this: lui rt, imm loads the lower halfword of the immediate imm into the upper halfword of register rt. The lower bits of the register are set to 0. with the…
user15071146
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Confusion about MIPS I-type instruction sign extend

I am learning the MIPS instructions, and when I test the I-type instrtuctions which need to sign extend the immediate, I am confused abou the following outcomes (All of them are run in MARS): Say we have the source code line ori $s1, $s2, 0xfd10,…
codekiwi
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Y86 Architecture Immediate VS Register Arithmetic Efficiency Question

I am working with a team in a Computer Architecture class on a Y86 program to implement multiplication function imul. We have a block of code that works, but we are trying to make it as execution-time efficient as we can. Currently our block looks…
Harrison Gerber
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Integer overflow in gas

I'm not sure if this is an assembly question or more a gas question. I've done the following to see how the assembler handles immediate values that are too large to encode in the respective register: addb $0xFFFF, %bl addw $0xFFFFFF, …
David542
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Set all bits of a register to 1, can ORI do that?

I got a few questions marked incorrect on a MIPS assembly exam, and I was wondering if anyone could help me figure out why because I don't understand why at all. First question: Set all bits of register $t1 to 1 My answer was ori $t1, $t1,…
apples2
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x86_64 Cannot add 64 bit value to rax, "operand mismatch on 'add'"

I am trying to assemble some 64-bit code and the assembling fails on the line: addq $0xffffff7fc0005000, %rax with the error: Error operand type mismatch for `add' The first operand is a 64-bit value and the latter a register which should…
brenden
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How to convert / encode a negative number as an immediate in MIPS machine code

I want to change this instruction to binary or machine code: addi $s3, $s1, -1000. I know how to encode the opcode, rs, and rt, but I have no idea how to convert -1000 to binary. I know how to get 1's complement and 2's complement. But i don't know…
jkdal
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Range of immediates in lui instruction

I'm not sure what is the range bound for the immediate in lui instruction. When I assemble: lui $t0,32768 It successfully went without errors. However, lui $t0,-32768 notified that -32768 out of range.
Tjh Thon
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Trouble understanding immediate on lw instruction(Mips)

Let's say I want to do an lw: lw $s1, l2 ($t1) From what I understand I'm saving in $s1 the word pointed by register ($t1) + l2 (immediate which in this case is the offset). But isn't the offset a reference to a certain block (in this case word) of…
user8848592
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How to design a virtual cpu / instruction set: distinguish LDA $02 from LDA B

So, I'm designing my own virtual CPU. I have some registers and memory and can execute some rudimentary instructions. But, now I'm stuck. How can I differentiate (in my assembled "machine code") between: LDA $02 ; Load the hex value 0x01 into…
Ariejan
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Comparing word against immediate value?

I'm struggling to grasp how to manipulate/compare data stored in registers (words/half-words/intermediate values) in MIPS. Does it matter if they each represent a different number of bytes? For example, is it valid to load an immediate value such as…
Tszhim Chan
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