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Questions tagged [gnu-make]

This tag is for questions about `gmake`, the GNU version of the `make` utility to maintain and update programs.

GNU Make is the GNU implementation of the Make utility. It is probably the most common version in use today.

GNU Make supports extensions to the Make language beyond the POSIX standard, therefore GNU Make solutions may not work under other versions, so the gnu-make tag is appropriate for questions from those using GNU Make, or pertaining to makefiles written for it.

Documentation

The latest GNU Make manual can be found in several formats here.

See also

make makefile

4424 questions
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Proper method for wildcard targets in GNU Make

I am trying to write a Makefile with my source and object files separated and I can't seem to figure out the proper way to accomplish this. I have two methods that work but I'm hoping someone can point the "correct" way to do this is. My project is…
nhmood
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How to use the include directive in a makefile for a specific target

I want to use the include directive only for a specific target. I do not want to run the other makefiles when the target is not needed because it means the makefiles are generated needlessly. So is there a way to conditionally use the include…
Matthew Mitchell
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1 answer

Printing in Makefiles: @echo vs $(info )

What is the difference between these two commands in makefiles: @echo "Hello World" $(info Hello World) As it seems, echo and info print the same output, so where is the difference? And when to use which one?
Vuks
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21
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4 answers

depending on directories in make

This is a followup to my earlier question: SO 4403861 because the suggested solutions broke the dependencies, making the makefile useless. I can't figure out why. I am using gnu make 3.82 I have a rule that works if the obj directory has been…
Dov
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21
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1 answer

Can GNU make execute a rule whenever an error occurs?

This is slightly different from Can a Makefile execute code ONLY when an error has occurred?. I'd like a rule or special target that is made whenever an error occurs (independent of the given target; without changing the rule for every target as the…
pesche
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20
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3 answers

How to check if a variable is equal to one of two values using the if/or/and functions

In a GNU makefile, I would like to set an output variable to one value (let's say "true") if an input variable is equal to one of two values and to another value ("false") when it is not. Thanks to this SO answer I've learned about the and and the…
Dariusz Walczak
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How to specify RPATH in a makefile?

I'm trying to specify rpath in my binary. My makefile looks like this- CC=gcc CFLAGS=-Wall LDFLAGS= -rpath='../libs/' main: main.c gcc -o main main.c clean: rm -f main main.o But when I query rpath using command readelf -a ./main |…
user837208
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20
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1 answer

Makefile pattern rule referencing stem in dependencies

I want a pattern rule with dependencies constructed both from the stem and using wildcards, i.e. something like $(FILES): %.o: %.c $(wildcard %*.c) This doesn't seem to work: the stem % is not expanded within the wildcard function (see…
Jaap Eldering
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20
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4 answers

Defining custom GNU make functions

What is the problem with the dep2 function in the sample code below? dep1 = $(eval makefile_list_$1 := $(MAKEFILE_LIST))$(eval -include $1.mk)$(eval MAKEFILE_LIST := $(makefile_list_$1)) define dep2 $(eval makefile_list_$1 :=…
g.b.
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20
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2 answers

Checking if variables are defined in a makefile

I have a GNU Makefile (version 3.81) that looks like the following: .PHONY: SPOneDot SPOneDot: ifndef X X=0.05 $$(info X undefined, changed to $X) endif ifndef Y Y=0.05 $$(info Y undefined, changed to $Y) endif …
Troy Rockwood
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1 answer

when multiple pattern rules match a target

The GNU make manual says It is possible that more than one pattern rule will meet these criteria. In that case, make will choose the rule with the shortest stem (that is, the pattern that matches most specifically). So it surprised me that: $…
Joe Doyle
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19
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3 answers

Create comma-separated lists in GNU Make

I have a Makefile with a set of booleans which must be used to control the flags for an external application. The problem is that the flag must be passed as a comma-separated string. Something like this (non-working pseudo code): WITH_LIST =…
Allan
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19
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3 answers

Makefile: all vs default targets

Talking with respect to GNU make, what is the difference between PHONY targets all: and default:. CC=g++ default: hello hello: hello.cpp $(CC) -o hello hello.cpp and CC=g++ all: hello hello: hello.cpp $(CC) -o hello hello.cpp Both of…
Piyush Deshmukh
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19
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6 answers

How can I make a target "private" in GNU make for internal use only? OR: how to best enforce target-specific variable-values?

I have some ancillary targets in a makefile that I want to restrict for internal or "private" use (only) inside the makefile. That is, I want to be able to specify these targets as dependencies from within the makefile, but I want to prevent the…
hoc_age
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19
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4 answers

get a default value when variable is unset in make

(edit: question more accurate based on @Michael feedback) In bash, I often use parameter expansion: the following commands print "default value" when $VARNAME is unset, otherwise it prints the VARNAME content. echo ${VARNAME:-default value} #if…
oHo
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