Questions tagged [att]

AT&T Syntax is an assembly syntax used in UNIX environments, that originates from AT&T Bell Labs. It is descended from PDP-11 assembly syntax.

AT&T Syntax is an assembly syntax used mostly in UNIX environments or by tools like gcc that originated in that environment. GNU (gcc/binutils) chose AT&T syntax for compatibility with AT&T Bell Labs' Unix assembler syntax for 386. That in turn based its syntax design on the PDP-11 PAL-11 assembler. (See also: Questions about AT&T x86 Syntax design and What was the original reason for the design of AT&T assembly syntax?)

It's used by the GNU assembler, and some compatible tools like clang's built-in assembler. These tools all also use GNU assembler directives like .globl main and .byte 0x12 instead of db 12h. See the GAS manual.

Most tools that default to AT&T syntax have options to use MASM-like GNU Intel Syntax. gcc -masm=intel -S or objdump -drwC -Mintel. Or in GAS, .intel_syntax noprefix is a directive. See the tag wiki.

See also the tag wiki for more about the x86 architecture and assembly in general. See the tag wiki for more about GNU C inline asm.


x87 syntax design bug / incompatibility with Intel syntax:

AT&T syntax reverses the mnemonics for fsubr and fsub, and other non-commutative x87 instructions like fdivr, when the destination is %st(i). See the GAS manual entry. Tools like objdump -d that disassemble in AT&T syntax are also compatible with this mnemonic -> opcode mapping. See also Objdump swapping fsubrp to fsubp on compiled assembly?

Modern version of objdump -d -Mintel use the Intel-syntax interpretation of the mnemonics as expected. (Editor's note: I seem to recall older versions of objdump and/or GAS in Intel-syntax mode still using the AT&T bug-compatible mnemonics.)


Syntax details

Operands are in destination-last order, the reverse of Intel syntax (used in Intel/AMD manuals). For example pshufd $0xE4, %xmm0, %xmm1 shuffles xmm0 and puts the result into xmm1. (Intel syntax pshufd xmm1, xmm0, 0E4h. To translate to/from Intel syntax, always reverse the list of operands.

Register names are prefixed with %, and immediates are prefixed with $. Operand-size is indicated with a b/w/l/q suffix on the mnemonic, but is optional if it's not implied by a register operand, the same way that dword or dword ptr is optional in NASM. Addressing modes use a totally different syntax, disp(base, idx, scale)

Examples:

  • sub $24, %rsp reserves 24 bytes on the stack.
  • mov foo, %eax is a load from the address of symbol foo.
  • mov $foo, %rax puts that address in %rax (mov-imm32)
  • lea foo(%rip), %rax (64-bit mode only) RIP-relative addressing mode for PIC (position-independent) code. (How to load address of function or label into register in GNU Assembler and what does "mov offset(%rip), %rax" do?)
  • movabs $0x123456789ABCDEF, %rax the imm64 or 64-bit absolute memory address forms of mov use the movabs mnemonic in AT&T syntax.
  • imul $13, 16(%rdi, %rcx, 4), %eax 32-bit load from rdi + rcx<<2 + 16, multiply that by 13, put the result in %eax. Intel imul eax, [16 + rdi + rcx*4], 13.
  • addb $1, byte_table(%rdi) increment a byte in a static table. (disp32+base addressing mode, so this is technically not an indexed addressing mode). Operand-size suffix is mandatory here, because neither operand is a register to imply a size.
  • addl $1, dword_table(, %rdi, 4) increment a dword in a static table. (disp32 + scaled-index addressing mode with no base register).
  • movswl (%rdi), %eax sign-extending load from word (w) to dword (l). Intel movsx eax, word [rdi]. AT&T needs different mnemonics for each source size of movzx / movsx. What does the MOVZBL instruction do in IA-32 AT&T syntax? and what does movsbl instruction do?.
  • cltq = cdqe in Intel, cltd = cdq. They (and related instructions for other sizes) sign extend within eax/rax or from eax into edx:eax (or rax into rdx:rax). The GNU assembler accepts the more-readable Intel mnemonics where the within-rax version always ends with e (except for cbw). See What does cltq do in assembly?.


Canonical Q&As:

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what is the order of source operands in AT&T syntax compared to Intel syntax?

The Intel ISA reference documentation for this instruction is clear: VPBLENDVB xmm1, xmm2, xmm3/m128, xmm4 Select byte values from xmm2 and xmm3/m128 using mask bits in the specified mask register, xmm4, and store the values into xmm1. xmm1 is the…
biscuits
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What assembly language does gcc produce on my system?

I'm trying to learn a bit about assembly. I decided to start by looking at the generated assembly files from simple source code. Of course, I get bombarded by instructions that I have no idea what they mean, and I start to search for their meaning…
JustANoob
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Apple App Tracking Transparency and Google Analytics

The recent WWDC Apple launched "App Tracking Transparency framework" and will be a part of iOS 14.3: With iOS 14, iPadOS 14, and tvOS 14, you will need to receive the user’s permission through the AppTrackingTransparency framework to track them or…
bjorkblom
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What's the difference between the x86-64 AT&T instructions movq and movabsq?

After reading this stack overflow answer, and this document, I still don't understand the difference between movq and movabsq. My current understanding is that in movabsq, the first operand is a 64-bit immediate operand whereas movq sign-extends a…
MattHusz
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How to determine if the registers are loaded right to left or vice versa

When reviewing gdb output and looking at the assembly calls, usually I can find a command using hard-coded values to determine whether the registers are being loaded right to left or vice versa. Usually something like the following: sub rsp,…
Unhandled Exception
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Division causes unbalanced parentheses

In GNU as (the GNU assembler), the following code assembles without error: mov $(80 * 24 + 4), %cx However, this code does not: mov $(80 * 24 / 4), %cx Emitting the highly unexpected error: example.S: Assembler messages: example.S:42: Error:…
Thanatos
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assembly cltq and movslq difference

Chapter 3 of Computer Systems A Programmer's Perspective (2nd Edition) mentions that cltq is equivalent to movslq %eax, %rax. Why did they create a new instruction (cltq) instead of just using movslq %eax,%rax? Isn't that redundant?
lisency
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What does the ljmp instruction do in the linux kernel fork system call?

I am studying linux kernel source (old version 0.11v). When I checked about fork system call, there is some asm code for context switching like this: /* * switch_to(n) should switch tasks to task nr n, first * checking that n isn't the current…
bongsu
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Is it possible to define a named dollar local label in GNU Assembler?

Is it possible to write something like .finished$: instead of 1$: and this label would still be only valid until the next not-local label is defined? That way it would be much more descriptive and I would still know after months why this is…
user3784955
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What does a comma in a parenthesis mean in the AT&T syntax for x86 assembly?

What does (register1, register2, 4) mean in AT&T assembly? For example: cmp %eax, (%esi, %ebx, 4)
Secret
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mov %eax,(%esp)

What is the difference between the following statements? mov %eax,%esp mov %eax,(%esp) I'm working on diffusing a binary bomb and am having trouble with a few of the mov and leal commands early on in the assembly.
arc
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Using C++ with assembly to allocate and create new functions at runtime

I've been working on a (C++) project, which requires completely dynamically allocated functions, which means malloc/new and mprotect and then modify the buffer manually to assembly code. Because of this I've wondered exactly, what is required in…
Elliott Darfink
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What does `var@GOTPCREL(%rip)` mean?

What does @GOTPCREL(%rip) mean? I've come across this line mov var@GOTPCREL(%rip), %rax and was a bit puzzled about the weird syntax. Can someone please recommend the relevant docs I should read to understand this? Thanks!
Curious Learner
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Run asm in Visual Studio code

Is there some sort of plugin in Visual Studio code (mac) that can run basic assembly, for example the following: .section .text .globl _start _start: movl $1, %eax movl $0, %ebx int $0x80 As it is, currently I am ssh'ing into a linux…
user12050586
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Why move 32-bit register to stack then from stack to xmm register?

I am compiling with gcc -m32 on a 64-bit machine. What is the difference between the following? Note that this is the AT&T syntax. # this movd %edx, %xmm0 # and this movl %edx, (%esp) movd (%esp), %xmm0
Russell
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