Questions tagged [arm]

This tag is used for questions related to the ARM (Advanced RISC Machine) family of computers; that is machines or electronics running on ARM processor cores or systems using an ARM core. For Azure-related questions, use [azure-resource-manager].

ARM (formerly Advanced RISC Machine and Acorn RISC Machine) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Acorn Computers and extended by ARM Holdings. The ARM architecture is the most widely used 32-bit instruction set architecture in numbers produced.

More information can be found in the Wikipedia article on ARM Architecture and the ARM Reference Documents.

There are many different variants of the ARM assembler that have evolved over time. The notation can be confusing. For instance, arm7 and armv7, are completely different. The first is a CPU implementation; the second is a CPU architecture. The architecture, also called a family, is a set of machine instructions (or ISA for instruction set architecture) that are generally compatible. See: Wikipedia's list of ARM microarchitectures for more.

Related tags:

  • - the first version consisted of a reduced set of 16bit instructions. thumb2, introduced with armv6, includes a mix of 16 and 32bit instructions, extended further in armv7 such that it can do most things the normal ARM ISA can.
  • - a SIMD extension for ARM CPUs
  • - an embedded ISA of the armv7 that only supports thumb2.
  • - the application version of armv7 ISA.
  • - the eighth arm architecture (armv8) includes 64bit registers.
  • - a security feature in some armv6, armv8 and armv7 CPUs.
  • - bus or interconnect specification used between CPUs and peripherals.
  • - SWD (Serial Wire Debug) is a light weight version of JTAG designed for ARM MCUs.

Do not create tags such as . Often those posts apply to other cortex-m CPUs and/or the difference between the versions is important to understand. Also newer future CPUs may extend a specific CPU and questions in that tag maybe relevant.

If you are only posting to the tag try to give some specifics about the system you are using.

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How to run a C program with no OS on the Raspberry Pi?

I'd like to experiment using the Raspberry Pi for some different low level embedded applications. The only problem is that, unlike the AVR and PIC microcontroller boards available, Raspberry Pi typically runs an OS (like Raspbian) that distributes…
watswat5
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How to place a variable at a given absolute address in memory (with GCC)

The RealView ARM C Compiler supports placing a variable at a given memory address using the variable attribute at(address): int var __attribute__((at(0x40001000))); var = 4; // changes the memory located at 0x40001000 Does GCC have a similar…
Bas van Dijk
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What does 'bank'ing a register mean?

Reading 'ARM Architecture' on Wikipedia and found the following statement: Registers R0-R7 are the same across all CPU modes; they are never banked. R13 and R14 are banked across all privileged CPU modes except system mode. What does banking a…
lang2
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Cross compiling static C hello world for Android using arm-linux-gnueabi-gcc

I want to build a static hello world from C using arm-linux-gnueabi-gcc as opposed to using the NDK standalone toolchain or Codesourcery for that matter. In Ubuntu... I have done the following: sudo apt-get install gcc-arm-linux-gnueabi I created a…
corbin
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Measurement of TLB effects on a Cortex-A9

After reading the following paper https://people.freebsd.org/~lstewart/articles/cpumemory.pdf ("What every programmer should know about memory") I wanted to try one of the author's test, that is, measuring the effects of TLB on the final execution…
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Why use LDR over MOV (or vice versa) in ARM assembly?

I'm looking through this tutorial: http://www.cl.cam.ac.uk/freshers/raspberrypi/tutorials/os/ok01.html The first line of assembly is: ldr r0,=0x20200000 the second is: mov r1,#1 I thought ldr was for loading values from memory into registers. But…
Jonathan.
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Want to compile native Android binary I can run in terminal on the phone

I've been trying for a couple days to compile a native ARM Android binary that will execute on my phone using a terminal application. I want to generate the same type of binary as the standard Posix binaries installed on the phone like ls, mkdir…
Synthetix
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fatal error: sqlite3.h: No such file or directory

I'm trying to build a C application through cross compiling for a Zynq board (ARM architecture). When I type make without mentioning the ARM arch, it works fine on my laptop. But as soon as I modify the Makefile, I get an error saying: main.c:20:43:…
user2263752
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What does bx lr do in ARM assembly language?

I can't seem to get my head around what bx lr does and how it differs from bl (label). I know that bl (label) stores the return address of that function in the link register but I don't know what bx lr does.
Thahleel al-Aleem
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What is meant by data cache and instruction cache?

From here: Instructions and data have different access patterns, and access different regions of memory. Thus, having the same cache for both instructions and data may not always work out. Thus, it's rather common to have two caches: an…
Celeritas
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How to work with external libraries when cross compiling?

I am writing some code for raspberry pi ARM target on x86 ubuntu machine. I am using the gcc-linaro-armhf toolchain. I am able to cross compile and run some independent programs on pi. Now, I want to link my code with external library such as…
Punit Soni
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ARM: link register and frame pointer

I'm trying to understand how the link register and the frame pointer work in ARM. I've been to a couple of sites, and I wanted to confirm my understanding. Suppose I had the following code: int foo(void) { // .. bar(); // (A) //…
user2233706
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How to create a QEMU ARM machine with custom peripherals and memory maps?

I am writing a code for Cortex-M3 cpu and I am performing unit testing using qemu-arm binary. For now everything works just fine. But I am wondering If I am able to test whole system using qemu-system-arm? I mean, I want to write custom "machine"…
mucka
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Windows Phone 7 and native C++/CLI

Microsoft recently released tools and documentation for its new Phone 7 platform, which to the dismay of those who have a big C++ codebase (like me) doesn't support native development anymore. Although I've found speculation about this decision…
Fabio Ceconello
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Real-life use cases of barriers (DSB, DMB, ISB) in ARM

I understand that DSB, DMB, and ISB are barriers for prevent reordering of instructions. I also can find lots of very good explanations for each of them, but it is pretty hard to imagine the case that I have to use them. Also, from the open source…
jaeyong
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