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Considering relative comparison of the features/properties of CISC and RISC Machines, it is needed to fill the following table (need to write only High/Low)

Feature/Property                CISC    RISC
Instruction Count in Program    Low     High
Cycles per instruction          High    Low
Hardware complexity             High    Low
Program size                    Low     High
Supported operations in ISA     High    Low
Supported addressing modes      High    Low

I did complete it this way, please check it and make changes if something is wrong.

Peter Cordes
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Tutor GRRR
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  • This is not a programming question or, in general, a question of any interest for everyone but for you or somebody taking your same exact class. You are better off asking on a *forum*. FWIW it seems correct for an introductory course to CPU architecture. – Margaret Bloom Oct 26 '22 at 11:26
  • Yup, those are typically true on average for typical CISC vs. RISC, especially if you take a classic RISC like MIPS or RISC-V, not one designed for efficiency like ARM (which is one of the least RISCy architectures to call itself a RISC). – Peter Cordes Oct 26 '22 at 17:17

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