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I'm writing a small OS that runs under protected mode. I am coming to a point where I want to load a custom interrupt descriptor table, and I don't know where to start. I have read some stuff on the OS Dev wiki, but there are a few questions that I need answered.

On the OS Dev wiki, it says that the first 32 (0-31) interrupts are reserved and used by the CPU, as exceptions, so don't use those for APIs or IRQs. The thing is that, if I am loading my custom interrupt table, don't I have to provide entries for all of those interrupts?

Also, the wiki states that the BIOS maps IRQ0-7 to interrupts 8-15. If this is the case, wouldn't the IRQ interrupts conflict with the reserved interrupts?

Is there something that I am not getting? Are interrupts 0-31 in a separate table or something? Someone please point me in the right direction and clear things up.

Alex Nichol
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2 Answers2

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When it says don't use those [interrupts 0-31] for APIs or IRQs, it means you shouldn't use them for a function other than the exceptions they are reserved for. You do need to define handlers for these interrupts so that you can handle the exceptions when they occur. See OSDev's exception page for a list of the exceptions with their interrupt number and description.

When the processor starts up, it is in real mode. In this mode, there are fewer exceptions, so fewer interrupts are reserved to handle them. As long as the processor is in real mode, it is safe to use interrupts 8-15 for IRQs. Before you enable interrupts in protected mode, you need to remap the IRQs to different interrupts. See the Initialization section of OSDev's PIC (Programmable Interrupt Controller) page for information on how to do this.

ughoavgfhw
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the first 32 (0-31) interrupts are reserved and used by the CPU, as exceptions, so don't use those for APIs or IRQs.

This is about WHO can emit the interrupt. 0-31 are for events of CPU itself (internal, e.g. page fault, divide by zero..) and other are for external events (hardware initiated, e.g. keyboard press, pci interrupt, etc). This is not about IDT. You should provide all interrupts in the table.

osgx
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