0

I have been trying to get the information on this for so long and still haven't got anything solid. So, what I have learned so far is that the IOMMU converts the IOVA provided by the DMA to the physical address and reads or writes from/to the memory. My questions are as follows:

  1. Does IOMMU store different Memory map for every single device? Does each device see the address range starting from zero in their virtual address space?

  2. Where are these IOMMU memory maps are stored?

  3. How does IOMMU know about which device the request is coming from if every device sees the virtual address starting from zero in their virtual address space?

  4. Does the device also transmit some kind of Device specific ID or something which IOMMU recognizes and uses this to unmap the IOVA and protect the other memory addresses being seen or written by this device?

zx485
  • 28,498
  • 28
  • 50
  • 59
Jigar Agrawal
  • 119
  • 2
  • 3
  • Your understanding seems to completely ignore the existence of the DMA Controller (3rd-party DMA) or the bus master (1st-party DMA). The CPU has to program the IOMMU and either the DMAC or bus master prior to any transfer of data between a peripheral device and memory. It's the DMAC or bus master (not the device) that controls the transfers. – sawdust Apr 14 '20 at 06:50
  • @sawdust The only part I knew was that DMA stands between the device and IOMMU. Correct me if I am wrong, please. How will IOMMU know from which device the request is coming from? – Jigar Agrawal Apr 14 '20 at 23:09
  • The descriptions of IOMMU I found seem to assume that the "device" is actually a bus master, but never properly identify it as such. Rather misleading IMO. Perhaps you should first learn (the simpler construct of) how DMA works without an IOMMU? – sawdust Apr 15 '20 at 16:57
  • I think you are right. – Jigar Agrawal Apr 15 '20 at 17:28

0 Answers0