I was curious if anybody has had any luck compiling the entire Xilinx ISE unisims library for GHDL simulator? I tried to compile just the package file for unisims and it gives me an error.
I Was wondering if it will compile completely by commenting out the unsupported sections of VHDL code... or it there's something else that needs to be done such as compiling a difference vital library or using different version --std. because I know I can pull out a single unisims component and compile with ghdl... just wondering how to complete 90% of the remaining components.
$ ghdl -a --std=08 --work=unisims C:/Xilinx/14.7/ISE_DE/ISE/vhdl/src/unisims/unisim_VCOMP.vhd
$ ghdl -a --std=08 --work=unisims C:/Xilinx/14.7/ISE_DE/ISE/vhdl/src/unisims/unisim_VPKG.vhd
ERROR: ../../src/vital2000/timing_p.vhdl:152:14: result subtype of a pure function cannot have access subelements