MSP432p401r: What are the possible inputs to CTLW0->BRW?

Question

The project I am working on includes i2c. I am looking through the datasheets and I cannot find how to use the prescaler setting, BRW. The section on this register does not tell me anything. It is here on the top of page 982. How does this register affect the SCL frequency?

Any help would be greatly appreciated!

score 0 · Accepted Answer · answered Dec 11 '18 at 15:45

Section 26.3.6 of the linked manual says:

The 16-bit value of UCBRx in register UCBxBRW is the division factor of the eUSCI_B clock source, BRCLK. […] The BITCLK frequency is given by:

    f_BitClock = f_BRCLK/UCBRx

The minimum high and low periods of the generated SCL are:

    t_LOW,MIN = t_HIGH,MIN = (UCBRx/2)/f_BRCLK when UCBRx is even

    t_LOW,MIN = t_HIGH,MIN = ((UCBRx – 1)/2)/f_BRCLK when UCBRx is odd

MSP432p401r: What are the possible inputs to CTLW0->BRW?

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