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I am designing an FSM in SystemVerilog for synthesis through the QuartusII (14.1) tool to put on an Altera FPGA. I am using an enum declaration to make the code much more reasonable:

typedef enum logic [7:0] { CMD_INIT,
                           CMD_WAIT,
                           CMD_DECODE,
                           CMD_ILLEGAL,
                           CMD_CMD0,
                           ... } cmd_st;
...
cmd_st cs, ncs;
...

Whenever Quartus synthesized this state machine, it seems to create a one-hot encoding despite the logic [7:0] part of the type. As in, when I got to add the states to SignalTap, I get all of the states as a signal 1-bit variable (cs.CMD_INIT, cs.CMD_WAIT, etc). While this is usually pretty useful, as I need to see a bunch of these states and some over values at once, I am running out of on-chip memory to contain all of these states (there are well over 8 of them; like 50+). So adding all of them to SignalTap takes ALOT of this memory; but if I could just put down the 8-bit value for cs, I would have plenty of space for other things.

I cant figure out how to get Quartus to NOT use the 1-hot encoding for the FSM. I have tried changing the settings (Settings->Compiler Settings->Advance Settings (Synthesis...)->State Machine Processing) to Minial Bits, User Encoding and Sequential, as well as added values for a few of the states:

typedef enum logic [7:0] { CMD_INIT           = 8'd0,
                           CMD_WAIT           = 8'd1,
                           CMD_DECODE         = 8'd2,
                           CMD_ILLEGAL        = 8'd3,
                           CMD_CMD0,

(Note, not all of them as there are a bunch of I might add even more in the middle)

Im not sure what else to do so that SignalTap sees only 8-bits for the states (which probably goes back to getting Quartus to synthesize this FSM as sequential rather than 1hot encoding)

Unn
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  • Try using the SM coding guidelines given [here](https://www.altera.com/en_US/pdfs/literature/hb/qts/qts_qii51007.pdf) on page `13-66`. It could be that the synthesizer is not inferring the state machine correctly. – Eugene Sh. Mar 27 '15 at 19:56
  • In particular it says ". If you do not specify the enumerated type as int unsigned, a signed int type is used by default. In this case, the Quartus II integrated synthesis synthesizes the design, but does not infer or optimize the logic as a state machine." – Eugene Sh. Mar 27 '15 at 19:57
  • @EugeneSh. Its definitely determining this is an FSM (it has it under the "State Machines" report). Im oging to try changing the type to see what it says. I did just notice a warning telling me "cannot use minimal number of bits to encode state machine" so that might be part of it. Though when I look under the State Machine report for the FSM in question, I get the encoding I expect (6-bit, sequential). But I cannot find this in SignalTap :( – Unn Mar 27 '15 at 20:31
  • @EugeneSh. I tried changing the type to int unsigned but Quartus behaves the same; Im pretty sure its identifying the state machine correctly and possibly even internally representing the FSM correctly based on the report; however SignalTap doesnt seem to have access to the encoded cs lines... and thats what I need... – Unn Mar 27 '15 at 20:50
  • How are are declaring your case statement? `case(cs)`, `unique case(cs)` `priority case(cs)` or a `case(1'b1)` variations? The `case(1'b1)` variations are very common for 1-hot. `unqiue` makes forces the parallel_case full_case directives. – Greg Mar 27 '15 at 22:17
  • @Greg Just `case (cs)` – Unn Mar 27 '15 at 22:32
  • Interesting... Do you get the same result If you convert to parameters instead of a enum? Also try keep the enum but declare `cs,ncs` as `logic[7:0]` or `byte` (static cast if necessary). Might be a bug with the synthesizer. – Greg Mar 27 '15 at 23:31

1 Answers1

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You can use synthesis pragmas to guide Quartus to use a specific encoding scheme for the state variables. This page gives you details on how to encode state machines using "sequential" encoding thereby avoiding the default one-hot encoding.

Pulimon
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