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I have a question about the VHDL synthesis system and more precisely about IO files operations. My question was does the synthesis system make the synthesis for file operations like write(), read() when they are writting in a VHDL code ? For instance inside this VHDL code : http://www.csee.umbc.edu/portal/help/VHDL/samples/file_io.vhdl

I've problem to imagine these operations converted into gates on the chip... So how does it work ?

Thank you guys ! :)

Tom.

user2904864
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You are quite correct, file operations cannot generally be synthesised.

One possible exception : open a file, read its contents into a ROM, close the file. The trick is that this all happens in a function returning an array, called by an initialisation clause (i.e. in a declaration) and is executed during synthesis so the result is a ROM, not hardware for handling files! Note that synthesis tools might not actually support this (yet) though there is no practical difficulty in implementing it. (I do not know which synth tools, if any, do support it).

So why does VHDL even have files? For testbenches, to exercise your design and log the test results.

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    Xilinx ISE can read and write files. E.g. the opbasm ROM template from Kevin Thibedeau uses the read functionality to initialize BlockRAMs. Example 2: I'm using the write functionality to export FSM/Enum encoding for ChipScope debugging and to export register to bus address mappings of my SoC as assembler code (constants and address tables). Quartus II ignores all I/O functions in synthesis. Vivado Synth does not support I/O function and types. – Paebbels Mar 27 '15 at 21:37